UNIVERSITY of GLASGOW

Particle Physics Theory

The High Voltage Patch Panel 0 (PP0)

Objective

The objective of the PP0 is to arrange and distribute the high voltage channels from the multi channel power supply to the 56 core cables. PP0 will be located in the counting room and it is at this point that hybrid guard will be connected to the high of the HV channel and thus powering the third channel of the HV channel. It is also that at this point that the current of the hybrid guard should be measured.

Implementation

  • The power supply end has a 51 pin SLA.H51.LLZG(male connector) (09.41.34.268.7) which will be populated with male 32 contacts FFA.05.403.ZLA1(09.41.33.210.9).
  • The patch panel 1 end has a 51 pin SLG.H51.LLZG(female connector) (09.41.34.258.9) populated with 48 male contacts FFA.05.403.ZLA1(09.41.33.210.9).

Shopping List

  • 7 51 pin SLA.H51.LLZBG .
  • 7 51 pin SLG.H51.LLZG .
  • 560 male contacts FFA.05.403.ZLA1 .

Documents

PCB mounted in PP0 box

Power supply side

PP0 wiring in PP1 side